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<ArticleSet>
<Article>
<Journal>
				<PublisherName>University of Kashan</PublisherName>
				<JournalTitle>Journal of Nanostructures</JournalTitle>
				<Issn>2251-7871</Issn>
				<Volume>11</Volume>
				<Issue>4</Issue>
				<PubDate PubStatus="epublish">
					<Year>2021</Year>
					<Month>10</Month>
					<Day>01</Day>
				</PubDate>
			</Journal>
<ArticleTitle>Impact of nano-Scale Statistical Variability on SRAM Stability: A Comparative Study between 6T and 8T Cells</ArticleTitle>
<VernacularTitle></VernacularTitle>
			<FirstPage>736</FirstPage>
			<LastPage>743</LastPage>
			<ELocationID EIdType="pii">111464</ELocationID>
			
<ELocationID EIdType="doi">10.22052/JNS.2021.04.011</ELocationID>
			
			<Language>EN</Language>
<AuthorList>
<Author>
					<FirstName>Daryoosh</FirstName>
					<LastName>Dideban</LastName>
<Affiliation>Department of Electrical and Computer Engineering</Affiliation>

</Author>
<Author>
					<FirstName>Hamed</FirstName>
					<LastName>Tasdighi</LastName>
<Affiliation>Department of Electrical and Computer Engineeirng</Affiliation>

</Author>
</AuthorList>
				<PublicationType>Journal Article</PublicationType>
			<History>
				<PubDate PubStatus="received">
					<Year>2020</Year>
					<Month>12</Month>
					<Day>18</Day>
				</PubDate>
			</History>
		<Abstract>Nano scale statistical variability which arises from discreteness of charge and granularity of matter has become one of major concerns in digital design particularly in sub-50nm technology nodes. Device intrinsic parameters such as the threshold voltage and drive current will be influenced by random dopants, line edge roughness and gate grain granularity which in turn results in variation of SRAM cell performance. Therefore, providing an accurate statistical model is one of the key issues among SRAM design community. Since both 6T and 8T SRAMs are widely used in the industry as standard cells, this article analyzes sensitivity of static noise margin (SNM) in response to statistical variations in 6- and 8-transistor cells. The results show that though 8T cells need more transistors and thus consume more area on the wafer compared with 6T cells, they are more stable and thus are better candidates for variability aware design in future technology nodes.</Abstract>
		<ObjectList>
			<Object Type="keyword">
			<Param Name="value">Intrinsic Fluctuations</Param>
			</Object>
			<Object Type="keyword">
			<Param Name="value">nano-CMOS</Param>
			</Object>
			<Object Type="keyword">
			<Param Name="value">SRAM stability</Param>
			</Object>
			<Object Type="keyword">
			<Param Name="value">Static Noise Margin</Param>
			</Object>
			<Object Type="keyword">
			<Param Name="value">Statistical Variability</Param>
			</Object>
		</ObjectList>
<ArchiveCopySource DocType="pdf">https://jns.kashanu.ac.ir/article_111464_fcb639117f3da3b4c5044b03acceba9e.pdf</ArchiveCopySource>
</Article>
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